Difference: DataAcquisition (1 vs. 7)
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The ATLAS read-out buffer input card, designed and built at RHUL. | ||||||||
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Revision 522 Apr 2008 - MikeGreen
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| We also developped the buffer manager software for the ROBin card in which the memory management of the buffer is performed in the host PC processor, and software to deal with data requests and data distribution. We have benchmarked the switch-based ROS, to be compared with the bus-based ROS. We developed a Test Suite of programs to configure and test the ROBin cards. | ||||||||
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The current Robin design interfaces to the ROS host PC using PCI-X . This technology is fast becoming obsolete as it has been superseeded by PCI Express (PCIe). The ATLAS ROS host PCs (ELONEX) have motherboards with six PCI-X slots; the CPUs are Intel single core Xeons, which are not manufactured any more. Even though ATLAS has 10% spares, it is realistic to assume that in a time scale of, say, 3-5 years ATLAS will need a new PCIe version of the Robin, to cope with irrecoverable Robin/motherboard/CPU failures. Investigation has found that the replacement of only one major component would convert the existing Robin design to PCIe thus allowing ROSs to be implemented using PCIe technology. | ||||||||
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| < < | The plan is to prototype and test a new Robin compatible with PCIe, by effecting minimal changes to the current, PCI-X-compatible, design. This will allow ATLAS to rely on more modern motherboards, thus ensuring the medium-term life of the ATLAS ROS system. An essential requirement is that the new RobinExpress ROSs must be able to coexist side-by-side with the current PCI-X ROSs. | |||||||
| > > | The plan is to prototype and test a new Robin compatible with PCIe, by effecting minimal changes to the current, PCI-X-compatible, design. This will allow ATLAS to rely on more modern motherboards, thus ensuring the medium-term life of the ATLAS ROS system. An essential requirement is that the new RobinExpress ROSs must be able to coexist side-by-side with the current PCI-X ROSs. | |||||||
Future Detectors work | ||||||||
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The ATLAS read-out buffer input card, designed and built at RHUL. Data Acquisition at RHULATLAS workOn ATLAS, we had a major involvement in the design, development, prototyping, testing and production of the Read Out Buffer (ROBin) cards, which are a key part of the Read Out Subsystem (ROS). The PCI-based ROBin card, which incorporates the S-LINK on the PCB is shown above. The UK production of 350 ROBin cards for ATLAS was completed in March 2006. We also developped the buffer manager software for the ROBin card in which the memory management of the buffer is performed in the host PC processor, and software to deal with data requests and data distribution. We have benchmarked the switch-based ROS, to be compared with the bus-based ROS. We developed a Test Suite of programs to configure and test the ROBin cards.RobinExpressThe current Robin design interfaces to the ROS host PC using PCI-X. This technology is fast becoming obsolete as it has been superseeded by PCI Express (PCIe). The ATLAS ROS host PCs (ELONEX) have motherboards with six PCI-X slots; the CPUs are Intel single core Xeons, which are not manufactured any more. Even though ATLAS has 10% spares, it is realistic to assume that in a time scale of, say, 3-5 years ATLAS will need a new PCIe version of the Robin, to cope with irrecoverable Robin/motherboard/CPU failures. Investigation has found that the replacement of only one major component would convert the existing Robin design to PCIe thus allowing ROSs to be implemented using PCIe technology.
The plan is to prototype and test a new Robin compatible with PCIe, by effecting minimal changes to the current, PCI-X-compatible, design. This will allow ATLAS to rely on more modern motherboards, thus ensuring the medium-term life of the ATLAS ROS system. An essential requirement is that the new RobinExpress ROSs must be able to coexist side-by-side with the current PCI-X ROSs.
Future Detectors work
DAQ proposal A current proposal for a DAQ associated with a future detector (for the next generation of accelerators) is to have the Detector Interface (DIF) connected to the Off-Detector Receiver (ODR) via a Link/Data Aggregator (LDA). The ODR would make use of the local PCI-Express card in the PC. 
PCI card (commercial component)
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